ESD (EN)
ESD (Electrostatic Discharge)
This section includes all information on subjects related to "ESD", "EOS" (Electrical Overstress) and "Latch-up". Please contact us per email or by means of our contact form, if any information is missing.
Industry Council on ESD Target Levels
The Industry Council on ESD Target Levels, which was founded by a group of semiconductor manufacturers in 2006 and was joined in the following years by other semiconductor manufacturers and even system manufacturers, has published several white papers, which can be downloaded below for further discussion:
- White Paper 1 (Rev. 4): A Case for Lowering Component Level HBM/MM ESD Specifications and Requirements
- White Paper 2 (Rev. 3): A Case for Lowering Component Level CDM ESD Specifications and Requirements
- White Paper 3 System Level ESD Part I (Rev. 1): Common Misconceptions and Recommended Basic Approaches
- White Paper 3 System Level ESD Part II (Rev. 2): Implementation of Effective ESD Robust Designs
- White Paper 3 System Level ESD Part III: Review of IEC 61000-4-2 ESD Testing and Impact on System-Efficient ESD Design (SEED)
- White Paper 4 (Rev. 1.2): Understanding Electrical Overstress
Before reading please consider that White Papers are often created by representatives from industry and academia. The final revision, which is often a result of long discussions and considerations, is not only characterized by scientific and technical findings but also influenced e.g. by economical aspects and interests. It is therefore important to understand that the statements given in the White Papers above neither originated from the ESD FORUM e.V. nor from any of its committees. They do not reflect the professional opinion or position of the ESD FORUM e.V. or any of its committees.
Discussion of White Paper 1
The proposals of the Industry Council to lower the minimum HBM and MM target levels of components were intensively and controversially discussed by the participants of the ESD-Forum 2007 and the ESD-Workshop 2008.
The reason for this discussion was a different perspective as the relation between the HBM robustness on component level (transistors, ICs, etc.) and the ESD robustness on system level (assembled PCB, modules, equipment, etc.) is concerned. Some participants assumed, that the HBM robustness on component level would correlate with the ESD robustness on system level. As a result, they were afraid, that the system-level ESD robustness of exposed IC pins would suffer from a reduced HBM robustness on component level. To avoid this risk, the Industry Council was asked to work out proposals, in order to improve the ESD robustness of these pins on system level. Furthermore, the question was raised, which IC pins would have to be regarded as "exposed" and hence critical and who should categorize these pins into "exposed" and "not exposed" pins. After all, a given IC pin could be both exposed and not exposed depending on its particular application. In an attempt to answer this question, it was argued that the ESD protection on system level falls into the responsibility of the system designer, who consequently would have to take care that pins lacking a sufficient system-level ESD protection would not be directly connected to any interface connection of a given system. In order to support system designers with the design of a suitable external ESD protection of exposed pins with reduced HBM robustness, it was proposed to add the TLP characteristics of the ESD protection integrated with corresponding ICs to their data sheets.
Another reason for the controversial discussion was the lack or availability of field return statistics recorded by system manufacturers that would allow to attribute these returns to ESD failures. As a result, participants of these system manufacturers could neither confirm nor refute the statistics reported by the Industry Council. Nevertheless, the reported failure statistics of automotive ICs was regarded as not very meaningful, since the failure rates of corresponding ICs are generally very small due to the high requirements of the automotive industry. As a reply, it was argued that the automotive industry has so far not published any data, that would substantiate the need for an ESD robustness of 2kV HBM on component level.
Nevertheless, many participants confirmed, that they have no significant ESD problems in their manufacturing floors. This includes companies, that have implemented only minimum ESD control methods. Furthermore, the conclusion of the Industry Council on safe HBM target levels of components was definitely confirmed by some participants. It was reported for instance, that only components with an HBM robustness less equal 500 V were marked as "sensitive". In the same connection it was explained by another system manufacturer, that the minimum HBM requirement for supplied components was set to 800 V; special release procedures are only required for components that do not meet this target value.
Still, in particular the participants of the automotive industry were hesitant to accept the proposals of the Industry Council, because they were afraid that the proposed minimum target levels could cause ESD problems.
Although, the discussion has shown that the customers of semiconductor manufacturers deal seriously with the proposals of the Industry Council, a consensus was not reached.
Investigation of the impact of White Paper 1
As a result of intensive discussions, the ESD FORUM e.V. has commissioned an investigation on the impact of the proposed lowering of HBM target levels on the system-level ESD robustness. The final report of this investigation can be downloaded below:
Further Information
Other documents of the Industry Council on ESD Target Levels can be downloaded below:
Abbreviations
AC | Alternating Current (Wechselstrom) |
---|---|
AEC | Automotive Electronics Council |
AMR | Absolute Maximum Ratings (Maximalspezifikationen) |
ANSI | American National Standards Institute |
CBM | Charged Board Model (Entladungsmodell einer geladenen Leiterplatte) |
CDE | Cable Discharge Event (Kabelentladung) |
CDM | Charged Device Model (Entladungsmodell eines geladenen Bauelements) |
CENELEC | Comite Europeen de Normalisation Electrotechnique (European Committee for Electrotechnical Standardization) |
CL- | Component-Level (komponentenbezogen) |
DC | Direct Current (Gleichstrom) |
DIN | Deutsches Institut für Normung |
DKE | Deutsche Kommision Elektrotechnik, Elektronik, Informationstechnik |
DUT | Device under Test (getestetes Bauelement) |
ECU | Engine Control Unit (Motorsteuergerät) |
EGB | ESD gefährdete Bauelemente |
EMC | Electromagnetic Compatibility (elektromagnetische Verträglichkeit) |
EMI | Electromagnetic Interference (elektromagnetische Störung) |
EMP | Electromagnetic Pulse (elektromagnetischer Puls) |
EMV | Elektromagnetische Verträglichkeit (vgl. EMC) |
EOS | Electrical Overstress (elektrische Überlastung) |
ESD | Electrostatic Discharge (elektrostatische Entladung) |
ESDA | Electrostatic Discharge Association; ESD Association |
EUT | Equipment under Test (getestetes Gerät) |
GOX | Gate Oxide (Gate Oxid eines MOS Transistors) |
HBM | Human Body Model (Entladungsmodell eines Menschen) |
HMM | Human Metal Model (Entladungsmodell eines Menschen über ein Werkzeug) |
IEC | International Electrotechnical Commission |
ISO | International Organization for Standardization |
JEDEC | Joint Electronic Device Engineering Council |
JEITA | Japan Electronics and Information Technology Industries Association |
LU | Latch-up (Verriegelung) |
MM | "Machine" Model (angebliches Entladungsmodell einer Maschine) |
OEM | Original Equipment Manufacturer (Erstausrüster) |
RF | Radio Frequency (Hochfrequenz) |
ROC | Recommended Operating Conditions (empfohlene Betriebsbedingungen) |
SAE | Society of Automotive Engineers |
SDM | Socketed Device Model (Entladungsmodell eines Bauelements im Sockel) |
SL- | System-Level (systembezogen) |
SOA | Safe Operating Area (sicherer Arbeitsbereich) |
tFT | typical Failure Threshold (typische Ausfallschwelle) |
TLP | Transmission Line Pulse (Wanderwellenpuls) |
VDE | Verband der Elektrotechnik, Elektronik und Informationstechnik |
ZVEI | Zentralverband Elektrotechnik- und Elektronikindustrie e.V. |
Standards
Different organisations are involved in the specification of ESD measurement, verification and validation regulations and standards, respectively. The most important are summarized below:
Link | Organisation |
---|---|
AEC | Automotive Electronics Council |
DIN | Deutsches Institut für Normung e.V. |
ESDA | EOS/ESD Association |
JEDEC | JEDEC Solid State Technology Association (Joint Electron Device Engineering Council) |
IEC | International Electrotechnical Commission |
ISO | International Organization for Standardization |
ANSI | American National Standards Institute |
SAE | SAE International (Society of Automotive Engineers) |
In addition, military applications are covered by the MIL-Standards as they are called.
All these standards can be divided into 2 main groups:
- ESD-Control: Standards addressing the handling of ESD-sensitive components and systems
- ESD-Protection: Standards addressing the validation of ESD-sensitive components and systems.
Subcategories
Glossary Article Count: 29
Terms Article Count: 10
Electrostatics Article Count: 5
Risks Article Count: 1
Components Article Count: 1
ESD Control Article Count: 0
Control Plan Article Count: 0
Manual Processes Article Count: 0
ESD Protection Article Count: 1
Simulation Article Count: 1
Models Article Count: 1
Metrology Article Count: 2
ESD Protection Article Count: 2
Guidelines Article Count: 0
Latch-up Article Count: 0
Electrical Overstress Article Count: 10
Electrical Overstress (EOS) is not part of the field "ESD". However, historically the field "ESD" has emerged from the larger field "EOS" at the end of the 1970s and is still closely intertwined with that field. As a result, ESD experts are aften consulted for their advice in the field "EOS". This is the reason, why this category is dedicated to the field "EOS".